FEATURES ■ ■ ■ ■LT6411650MHz Differential ADCDriver/Dual Selectable Gain Amplifi erDESCRIPTIONThe LT®6411 is a dual amplifi er with individually selectable gains of +1, +2 and –1. The amplifi ers have excellent dis-tortion performance for driving ADCs as well as excellent bandwidth and slew rate for video, data transmission and other high speed applications. Single-ended to differential conversion with a system gain of 2 is particularly straight-forward by confi guring one amplifi er with a gain of +1 and the other amplifi er with a gain of –1. The LT6411 can be used on split supplies as large as ±6V and on a single supply as low as 4.5V.Each amplifi er draws only 8mA of quiescent current when enabled. When disabled, the output pins become high impedance and each amplifi er draws less than 350µA.The LT6411 is manufactured on Linear Technology’s proprietary, low voltage, complimentary, bipolar process and is available in the ultra-compact, 3mm × 3mm, 16pin QFN package. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation.All other trademarks are the property of their respective owners.650MHz –3dB Small-Signal Bandwidth600MHz –3dB Large-Signal BandwidthHigh Slew Rate: 3300V/µsEasily Confi gured for Single-Ended to Differential Conversion■ 200MHz ±0.1dB Bandwidth■ User Selectable Gain of +1, +2 and –1■ No External Resistors Required■ 46.5dBm Equivalent OIP3 at 30MHz When Driving an ADC■ IM3 with 2VP-P Composite, Differential Output: –87dBc at 30MHz, –83dBc at 70MHz■ –77dB SFDR at 30MHz, 2VP-P Differential Output■ 6ns 0.1% Settling Time for 2V Step■ Low Supply Current: 8mA per Ampifi er■ Differential Gain of 0.02%, Differential Phase of 0.01°■ 50dB Channel Separation at 100MHz■ Wide Supply Range: ±2.25V (4.5V) to ±6.3V (12.6V)■ 3mm × 3mm 16-Pin QFN PackageAPPLICATIONS Differential ADC Driver■ Single-Ended to Differential Conversion■ Differential Video Line Driver■TYPICAL APPLICATIONDifferential ADC Driver5VVCCLT641124ΩAIN–1.9VDC370Ω30MHzINPUT1.9VDC370Ω30MHz 2-Tone 32768 Point FFT, LT6411 Driving an LTC®2249 14-Bit ADC0–10–20–30–40–50–60–70–80–90–100–110–120–130–14032768 POINT FFTTONE 1 AT 29.5MHz, –7dBFSTONE 2 AT 30.5MHz, –7dBFSIM3 = –87dBc370Ω370ΩLTC224914-BIT ADC80MspsAIN+6411 TA01a–+DGNDENVEE24ΩAMPLITUDE (dBFS)+–051015202530FREQUENCY (MHz)35406411 TA01b6411f1元器件交易网www.cecb2b.com
LT6411ABSOLUTE MAXIMUM RATINGS
(Note 1)PACKAGE/ORDER INFORMATION
TOP VIEWIN2+IN2–15
Total Supply Voltage (VCC to VEE) ..........................12.6VInput Current (Note 2) ..........................................±10mAOutput Current (Continuous) ...............................±70mAEN to DGND Voltage (Note 2) ..................................5.5VOutput Short-Circuit Duration (Note 3) ............Indefi niteOperating Temperature Range (Note 4) ...–40°C to 85°CSpecifi ed Temperature Range (Note 5) ....–40°C to 85°CStorage Temperature Range ...................–65°C to 125°CJunction Temperature ...........................................125°CIN1–14
16
VEE1VEE2VEE3NC4
5
6
7
8
17
IN1+13
12DGND11EN10VCC9
VCC
OUT2UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFNTJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/WEXPOSED PAD (PIN 17) IS VEE, MUST BE SOLDERED TO PCBORDER PART NUMBERLT6411CUDLT6411IUDOUT1VCCVEEUD PART MARKING*LCGPLCGPOrder Options Tape and Reel: Add #TRLead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBFLead Free Part Marking: http://www.linear.com/leadfree/Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.*Temperature grade is identifi ed by a label on the shipping container.ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the full operating SYMBOLVOSIINRINCINVCMRPSRRIPSRRAV ERRAV MATCHVOUTPARAMETERInput Referred Offset VoltageInput CurrentInput ResistanceInput CapacitanceMaximum Input Common Mode VoltageMinimum Input Common Mode VoltagePower Supply Rejection RatioInput Current Power Supply RejectionGain ErrorGain MatchingMaximum Output Voltage SwingVS (Total) = 4.5V to 12V (Note 6)VS (Total) = 4.5V to 12V (Note 6)VOUT = ±2VVOUT = ±2VRL = 1kRL = 150ΩRL = 150Ω±3.70±3.25±3.10●●●temperature range, otherwise specifi cations are at TA = 25°C. VS = ±5V, AV = 2, RL = 150Ω, CL = 1.5pF, VEN = 0.4V, VDGND = 0V, unless otherwise noted.CONDITIONSVIN = 0V, VOS = VOUT/2●●●MINTYP3–17MAX±10±20±50UNITSmVmVµAkΩpFVVdBVIN = ±1Vf = 100kHz1505001VCC – 1VEE + 156621–1.2±1±3.95±3.68220.5111435035050±4±5µA/V%%VVVmAmAµAµAµAµA6411f
●●ISSupply Current, Per Amplifi erSupply Current, Disabled, per Amplifi erVEN = 4VVEN = OpenVEN = 0.4VVEN = V+●●●●IENEnable Pin Current–200–950.52
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LT6411ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the full operating SYMBOLISCSR–3dB BW0.1dB BWFPBWPARAMETEROutput Short-Circuit CurrentSlew RateSmall-Signal –3dB BandwidthGain Flatness ±0.1dB BandwidthFull Power Bandwidth 2V DifferentialFull Power Bandwidth 2VFull Power Bandwidth 4VAll Hostile Crosstalktstr, tfdGdPSettling TimeSmall-Signal Rise and Fall TimeDifferential GainDiffi erential PhaseCONDITIONSRL = 0Ω, VIN = ±1V±1V on ±2V Output Step (Note 9)VOUT = 200mVP-P, Single EndedVOUT = 200mVP-P, Single EndedVOUT = 2VP-P Differential, –3dBVOUT = 2VP-P (Note 7)VOUT = 4VP-P (Note 7)f = 10MHz, VOUT = 2VP-Pf = 100MHz, VOUT = 2VP-P0.1% to VFINAL, VSTEP = 2V10% to 90%, VOUT = 200mVP-P(Note 8)(Note 8)270●temperature range, otherwise specifi cations are at TA = 25°C. VS = ±5V, AV = 2, RL = 150Ω, CL = 1.5pF, VEN = 0.4V, VDGND = 0V, unless otherwise noted.MIN±501700TYP±1053300650200600525263–75–5065500.020.01MAXUNITSmAV/µsMHzMHzMHzMHzMHzdBdBnsps%DegThe ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCC = 5V, VEE = 0V, AV = 2, No RLOAD, VEN = 0.4V, VDGND = 0V, unless otherwise noted.SYMBOL1MHz SignalHDIMD31MSecond/Third Harmonic DistortionThird-Order IMD2VP-P Differential2VP-P Differential, RL = 200Ω Differential2VP-P Differential Composite, f1 = 0.95MHz, f2 = 1.05MHz2VP-P Differential Composite, f1 = 0.95MHz, f2 = 1.05MHz, RL = 200Ω DifferentialOIP31MNFen1MP1dBHDIMD310MOutput Third-Order InterceptNoise FigureInput Referred Noise Voltage Density1dB Compression PointSecond/Third Harmonic DistortionThird-Order IMD(Note 10)2VP-P Differential2VP-P Differential, RL = 200Ω Differential2VP-P Differential Composite, RL = 1k, f1 = 9.5MHz, f2 = 10.5MHz2VP-P Differential Composite, f1 = 9.5MHz, f2 = 10.5MHz, RL = 200Ω Differential OIP310MNFen10MP1dBOutput Third-Order InterceptNoise FigureInput Referred Noise Voltage Density1dB Compression Point(Note 10)Differential, f1 = 9.5MHz, f2 = 10.5MHz (Note 10)Single EndedDifferential, f1 = 0.95MHz, f2 = 1.05MHz (Note 10)Single Ended–88–87–93–9149.525.1819.5–85–76–92–894924.77.719.5dBcdBcdBcdBcdBmdBnV/√HzdBmdBcdBcdBcdBcdBm dBnV/√HzdBmPARAMETERCONDITIONSMINTYPMAXUNITSNoise/Harmonic Performance Input/Output Characteristics 10MHz Signal6411f
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LT6411ELECTRICAL CHARACTERISTICS The ● denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCC = 5V, VEE = 0V, AV = 2, No RLOAD, VEN = 0.4V, VDGND = 0V, unless otherwise noted.PARAMETERSecond/Third Harmonic DistortionThird-Order IMDCONDITIONS2VP-P Differential2VP-P Differential, RL = 200Ω Differential2VP-P Differential Composite, f1 = 29.5MHz, Differential, f2 = 30.5MHz2VP-P Differential Composite, f1 = 29.5MHz, f2 = 30.5MHz, RL = 200Ω DifferentialOIP330MNFen30MP1dBHDIMD370MOutput Third-Order InterceptNoise FigureInput Referred Noise Voltage Density1dB Compression PointSecond/Third Harmonic DistortionThird-Order IMD(Note 10)2VP-P Differential2VP-P Differential, RL = 200Ω Differential2VP-P Differential Composite, f1 = 69.5MHz, Differential, f2 = 70.5MHz2VP-P Differential Composite, f1 = 69.5MHz, f2 = 70.5MHz, RL = 200Ω DifferentialOIP370MNFen70MP1dBOutput Third-Order InterceptNoise FigureInput Referred Noise Voltage Density1dB Compression Point(Note 10)Differential, f1 = 69.5MHz, f2 = 70.5MHz (Note 10)Single EndedDifferential, f1 = 29.5MHz, f2 = 30.5MHz (Note 10)Single EndedMINTYP–77–64–87–7546.524.67.619.5–63–52–83–6444.524.77.719.5MAXSYMBOLHDIMD330MUNITSdBcdBcdBcdBcdBmdBnV/√HzdBmdBcdBcdBcdBcdBmdBnV/√HzdBm30MHz Signal70MHz SignalNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: This parameter is guaranteed to meet specifi ed performance through design and characterization. It is not production tested.Note 3: As long as output current and junction temperature are kept below the Absolute Maximum Ratings, no damage to the part will occur. Depending on the supply voltage, a heat sink may be required.Note 4: The LT6411C is guaranteed functional over the operating temperature range of –40°C to 85°C.Note 5: The LT6411C is guaranteed to meet specifi ed performance from 0°C to 70°C. The LT6411C is designed, characterized and expected to meet specifi ed performance from –40°C and 85°C but is not tested or QA sampled at these temperatures. The LT6411I is guaranteed to meet specifi ed performance from –40°C to 85°C.Note 6: The two supply voltage settings for power supply rejection are shifted from the typical ±VS points for ease of testing. The fi rst measurement is taken at VCC = 3V, VEE = –1.5V to provide the required 3V headroom for the enable circuitry to function with EN, DGND and all inputs connected to 0V. The second measurement is taken at VCC = 8V, VEE = –4V.Note 7: Full power bandwidth is calculated from the slew rate: FPBW = SR/(π • V P-P)Note 8: Differential gain and phase are measured using a Tektronix TSG120YC/NTSC signal generator and a Tektronix 1780R video measurement set. The resolution of this equipment is better than 0.05% and 0.05°. Ten identical amplifi er stages were cascaded giving an effective resolution of better than 0.005% and 0.005°.Note 9: Slew rate is 100% production tested on channel 1. Slew rate of channel 2 is guaranteed through design and characterization.Note 10: Since the LT6411 is a feedback amplifi er with low output impedance, a resistive load is not required when driving an ADC. Therefore, typical output power is very small. In order to compare the LT6411 with typical gm amplifi ers that require 50Ω output loading, the LT6411 output voltage swing driving an ADC is converted to OIP3 and P1dB as if it were driving a 50Ω load. 6411f
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LT6411TYPICAL PERFORMANCE CHARACTERISTICS Supply Current per Amplifi ervs Temperature1210SUPPLY CURRENT (mA)86420–55–35–15VEN = 0VVEN = 0.4VVS = ±5VRL = ∞VIN+, VIN– = 0VSUPPLY CURRENT (mA)12All measurements are per amplifi er with single-ended outputs unless otherwise noted.Supply Current per Ampifi ervs Supply VoltageVCC = –VEEVEN, VDGND, VIN+, VIN– = 0V10TA = 25°CSUPPLY CURRENT (mA)86420525456585105125TEMPERATURE (°C)6411 G01Supply Current per Amplifi ervs EN Pin Voltage121086420TA = –55°CTA = 25°CTA = 125°CVS = ±5VVDGND = 0VVIN+, VIN– = 0V0123456789101112TOTAL SUPPLY VOLTAGE (V)6411 G0200.51.01.52.02.53.0EN PIN VOLTAGE (V)3.54.06411 G03Output Offset Voltage vs Temperature20VS = ±5V15VIN = 0VAV = 21050–5–10–15–20–55–35–15525456585105125TEMPERATURE (°C)6411 G04Positive Input Bias Currentvs Input Voltage20VS = ±5VAV = 2EN PIN CURRENT (µA)TA = 125°C–20TA = 25°CTA = –55°C–400–20–40–60–80–100–120–60–2.5–1.50.5–0.5INPUT VOLTAGE (V)1.52.56411 G05EN Pin Current vs EN Pin VoltageVS = ±5VVDGND = 0VIN+ BIAS CURRENT (µA)OFFSET VOLTAGE (mV)0TA = 125°CTA = –55°CTA = 25°C–1400132EN PIN VOLTAGE (V)456411 G06Output Voltage vs Input Voltage5VS = ±5V4RL = 1kAV = 13OUTPUT VOLTAGE (V)OUTPUT VOLTAGE (V)210–1–2TA = –55°C–3–4TA = 125°C–5–4.5–3.5–2.5–1.5–0.50.51.52.53.54.5INPUT VOLTAGE (V)6411 G07Output Voltage Swing vs ILOAD(Output High)5VS = ±5VAV = 2VIN = 2VOUTPUT VOLTAGE (V)TA = –55°CTA = 25°C2TA = 125°C10Output Voltage Swing vs ILOAD(Output Low)VS = ±5VAV = 2VIN = –2VTA = 25°C–2TA = 125°C–3TA = –55°C4TA = 25°C–13–400102030405060708090100SOURCE CURRENT (mA)6411 G08–50102030405060708090100SINK CURRENT (mA)6411 G096411f5元器件交易网www.cecb2b.com
LT6411TYPICAL PERFORMANCE CHARACTERISTICS Input Noise Spectral Density1000INPUT NOISE (nV/√Hz OR pA/√Hz)VS = ±5VAV = 2TA = 25°CINPUT IMPEDANCE (kΩ)1000All measurements are per amplifi er with single-ended outputs unless otherwise noted.Positive Input Impedance vs FrequencyVS = ±5VVIN = 0VTA = 25°CREJECTION RATIO (dB)7060504030201010.0010.010.11FREQUENCY (kHz)101006553 G10PSRR vs Frequency±PSRR–PSRRVS = ±5VAV = 2TA = 25°C100100en10in10+PSRR10.10.010.1110FREQUENCY (MHz)10010006411 G1100.0010.010.11FREQUENCY (MHz)101006411 G12Frequency Response vs Gain Confi guration9AV = 2, VOUT = 2VP-P6NORMALIZED GAIN (dB)AV = 2, VOUT = 200mVP-PGAIN (dB)3AV = 1, AV = –1,VOUT = 200mVP-P0AV = 1, VOUT = 2VP-P–3VS = ±5VRL = 150ΩTA = 25°C1AV = –1, VOUT = 2VP-P6.56.46.36.26.16.05.95.85.75.610100FREQUENCY (MHz)10006411 G13Gain Flatness vs FrequencyVS = ±5VAV = 2VOUT = 200mVP-PRL = 150ΩTA = 25°CCHANNEL 118Frequency Response with Capacitive LoadsVS = ±5V16A = 2V14VOUT = 2VP-PRL = 150Ω12TA = 25°C1086420–2–4–60.1CL = 2.2pFCL = 6.8pFCL = 12pFCHANNEL 2–60.15.50.1110100FREQUENCY (MHz)10006411 G14AMPLITUDE (dB)110100FREQUENCY (MHz)10006553 G15Harmonic Distortion vs Frequency, Differential Input0–10–20DISTORTION (dBc)–30–40–50–60–70–80–90–1001HD2, RL = ∞10FREQUENCY (MHz)1006411 G16Harmonic Distortion vs Amplitude, 30MHz, Differential Input AV = 2, VCC = 5V–10VEE = 0V, VCM = 1.6VRL = ∞–20TA = 25°C–30–40–50–60–70–80–90–100HD3HD200–10–20DISTORTION (dBc)–30–40–50–60–70–80–90–100Harmonic Distortion vs Load, 30MHz, Differential InputVOUT = 2VP-P, DIFFERENTIALAV = 2, VCC = 5VVEE = 0V, VCM = 1.6VTA = 25°CHD3, RL = 200ΩHD3, RL = ∞HD2, RL = 200ΩDISTORTION (dBc)VOUT = 2VP-P, DIFFERENTIALAV = 2, VCC = 5VVEE = 0V, VCM = 1.6VDIFFERENTIAL RLOADTA = 25°CHD3HD201002003004005006007008009001000DIFFERENTIAL RLOAD (Ω)1011 G060.40.60.81.01.21.41.61.82.0DIFFERENTIAL OUTPUT AMPLITUDE (VP-P)6411 G176411f6元器件交易网www.cecb2b.com
LT6411TYPICAL PERFORMANCE CHARACTERISTICS Third Order Intermodulation Distortion vs Frequency, Differential Input0–10–20THIRD ORDER IMD (dBc)–30–40–50–60–70–80–90–10001040302050FREQUENCY (MHz)607000RL = 200ΩRL = ∞VOUT = 2VP-P, COMPOSITE, DIFFERENTIAL1MHz TONE SPACINGAV = 2, VCC = 5VVEE = 0V, VCM = 1.6VDIFFERENTIAL RLOADTA = 25°C605040OIP3 (dBm)RL = 200Ω302010VOUT = 2VP-P, COMPOSITE, DIFFERENTIAL1MHz TONE SPACINGAV = 2, VCC = 5VVEE = 0V, VCM = 1.6VDIFFERENTIAL RLOADTA = 25°C1040305020FREQUENCY (MHz)6070RL = ∞COMPUTED FOR 50Ω ENVIRONMENTOUTPUT IMPEDANCE (Ω)100All measurements are per amplifi er with single-ended outputs unless otherwise noted.Output Third Order Intercept vs Frequency, Differential Input1000DISABLEDVEN = 4VOutput Impedance vs Frequency101ENABLEDVEN = 0.4V0.10.01VS = ±5VRL = 150ΩTA = 25°C10010006411 G210.1101FREQUENCY (MHz)6411 G196411 G20Small-Signal Transient Response0.150.100.05OUTPUT (V)0–0.05–0.10–0.150VIN = 100mVP-PAV = 2VS = ±5VRL = 150ΩTA = 25°COUTPUT (V)2.0Video Amplitude Transient ResponseVIN = 700mVP-PAV = 2VS = ±5VRL = 150ΩTA = 25°COUTPUT (V)43210–1–2–3Large-Signal Transient ResponseVIN = 2.5VP-PAV = 2VS = ±5VRL = 150ΩTA = 25°C1.51.00.502468101214161820TIME (ns)6411 G22–0.502468101214161820TIME (ns)6411 G23– 402468101214161820TIME (ns)6411 G24Crosstalk vs Frequency0–20AMPLITUDE (dB)–40–60–80DRIVE 2LISTEN 1DRIVE 1LISTEN 2VS = ±5VVOUT = 2VP-PRL = 150ΩTA = 25°C4035PERCENT OF UNITS (%)3025201510510001635 G25Gain Error DistributionVS = ±5VVOUT = ±2VRL = 150ΩTA = 25°C3530PERCENT OF UNITS (%)252015105Gain Matching DistributionVS = ±5VVOUT = ±2VRL = 150ΩTA = 25°C–100–120110100FREQUENCY (MHz)0–3.003.0–2.0–1.01.02.0GAIN ERROR–INDIVIDUAL CHANNEL (%)6411 G260–3.0–2.0–1.001.02.03.0GAIN MATCHING–BETWEEN CHANNELS (%)6411 G276411f7元器件交易网www.cecb2b.com
LT6411PIN FUNCTIONS
VEE (Pins 1, 2): Negative Supply Voltage. VEE pins are not internally connected to each other and must all be con-nected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section.VEE (Pins 3, 7): Negative Supply Voltage for Output Stage. VEE pins are not internally connected to each other and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section.NC (Pin 4): This pin is not internally connected.OUT2 (Pin 5): Output of Channel 2. The gain between the input and the output of this channel is set by the connection of the channel 2 input pins. See Table 1 in Applications Information for details.VCC (Pins 6, 9): Positive Supply Voltage for Output Stage. VCC pins are not internally connected to each other and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section.OUT1 (Pin 8): Output of Channel 1. The gain between the input and the output of this channel is set by the connection of the channel 1 input pins. See Table 1 in Applications Information for details.VCC (Pin 10): Positive Supply Voltage. VCC pins are not internally connected to each other and must all be con-nected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section.EN (Pin 11): Enable Control Pin. An internal pull-up resis-tor of 46k will turn the part off if the pin is allowed to fl oat and defi nes the pin’s impedance. When the pin is pulled low, the part is enabled.DGND (Pin 12): Digital Ground Reference for Enable Pin. This pin is normally connected to ground.IN1+ (Pin 13): Channel 1 Positive Input. This pin has a nominal impedance of 400kΩ and does not have an internal termination resistor.IN1– (Pin 14): This pin connects to the internal resistor network of the channel 1 amplifi er, connecting by a 370Ω resistor to the inverting input. IN2– (Pin 15): This pin connects to the internal resistor network of the channel 2 amplifi er, connecting by a 370Ω resistor to the inverting input.IN2+ (Pin 16): Channel 2 Positive Input. This pin has a nominal impedance of 400kΩ and does not have an internal termination resistor.Exposed Pad (Pin 17): The pad is internally connected to VEE (Pin 1). If split supplies are used, do not tie the pad to ground.6411f
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LT6411APPLICATIONS INFORMATIONPower SuppliesThe LT6411 can be operated on as little as ±2.25V or a single 4.5V supply and as much as ±6V or a single 12V supply. Internally, each supply is independent to improve channel isolation. Note that the Exposed Pad is internally connected to VEE and must not be grounded when using split supplies. Do not leave any supply pins disconnected or the part may not function correctly!Enable/ShutdownThe LT6411 has a TTL compatible shutdown mode con-trolled by the EN pin and referenced to the DGND pin. If the amplifi er will be enabled at all times, the EN pin can be connected directly to DGND. If the enable function is desired, either driving the pin above 2V or allowing the internal 46k pull-up resistor to pull the EN pin to the top rail will disable the amplifi er. When disabled, the DC output impedance will rise to approximately 740Ω through the internal feedback and gain resistors (assuming inputs at ground). Supply current into the amplifi er in the disabled state will be primarily through VCC and approximately equal to (VCC – VEN)/46k. It is important that the two following constraints on the DGND pin and the EN pin are always followed: VCC – VDGND ≥ 3V –0.5V ≤ VEN – VDGND ≤ 5.5VSplit supplies of ±3V to ±5.5V will satisfy these require-ments with DGND connected to 0V.In dual supply cases with VCC less than 3V, DGND should be connected to a potential below ground such as VEE. +VIN+LT6411OUT+AV = +1IN+LT6411+VOUT+AV = –1IN+LT6411Since the EN pin is referenced to DGND, it may need to be pulled below ground in those cases. In order to protect the internal enable circuitry, the EN pin should not be forced more than 0.5V below DGND.In single supply applications above 5.5V, an additional resistor may be needed from the EN pin to DGND if the pin is ever allowed to fl oat. For example, on a 12V single supply, a 33k resistor would protect the pin from fl oating too high while still allowing the internal pull-up resistor to disable the part.The DGND pin should not be pulled above the EN pin since doing so will turn on an ESD protection diode. If the EN pin voltage is forced a diode drop below the DGND pin, current should be limited to 10mA or less. The enable/disable times of the LT6411 are fast when driven with a logic input. Turn on (from 50% EN input to 50% output) typically occurs in less than 50ns. Turn off is slower, but is less than 300ns.Gain SelectionThe gain of the internal amplifi ers of the LT6411 is confi g-ured by connecting the IN+ and IN– pins to the input signal or ground in the combinations shown in Figure 1.As shown in the Simplifi ed Schematic, the IN– pins connect to the internal gain resistor of each amplifi er, and therefore, each pin can be confi gured independently. Floating the IN– pins is not recommended as the parasitic capacitance causes an AC gain of 2 at high frequencies, despite a DC gain of +1. Both inputs are connected together in the gain of +1 confi guration to avoid this limitation. +V+–AV = +2+–+–OUT–IN–IN––+–VOUT––+–VOUT–IN––+6411 F01OUT+–VFigure 1. LT6411 Confi gured in Noninverting Gain of 2, Noninverting Gain of 1 and Inverting Gain of 1, All Shown with Dual Supplies6411f9元器件交易网www.cecb2b.com
LT6411APPLICATIONS INFORMATIONInput ConsiderationsThe LT6411 input voltage range is from VEE + 1V to VCC – 1V. Therefore, on split supplies the LT6411 input range is always as large as or larger than the output swing. On a single positive supply with a gain of +2 and IN– con-nected to ground, however, the input range limit of +1V limits the linear output low swing to 2V (1V multiplied by the internal gain of 2).The inputs can be driven beyond the point at which the output clips so long as input currents are limited to ±10mA. Continuing to drive the input beyond the output limit can result in increased current drive and slightly increased swing, but will also increase supply current and may result in delays in transient response at larger levels of overdrive.DC Biasing Differential Amplifi er Applications The inputs of the LT6411 must be DC biased within the input common mode voltage range, typically VEE + 1V to VCC – 1V. If the inputs are AC coupled or DC biased be-yond the input voltage range of a driven A-to-D converter, DC biasing or level shifting will be required. In the basic circuit confi gurations shown in Figure 1, the DC input common mode voltage and the differential input signal are both multiplied by the amplifi er gain. In the gain of +2 confi guration, the DC common mode voltage gain can be set to unity by adding a capacitor at the IN– pins as shown in Figure 2.If the inputs are AC coupled or the LT6411 is preceded by a highpass fi lter, the input common mode voltage can be set by resistor dividers as shown in Figure 3. Adding +VIN+VDCLT6411the blocking capacitor to the gain setting resistors sets the input and output DC common mode voltages equal. When using the LT6411 to drive an A-to-D converter, the DC common mode voltage level will affect the harmonic distortion of the combined amplifi er/ADC system. Figure 4 shows the measured distortion of an LTC2249 ADC when driven by the LT6411 at different common mode voltage levels with the inputs confi gured as shown in Figure 3. Adjusting the DC bias voltage can optimize the design for the lowest possible distortion.If the input signals are within the input voltage range and output swing of the LT6411, but outside the input range of an ADC or other circuit the LT6411 is driving, V+IN+OVR2CLARGER1VDCLT6411+V+–OUT+VDCV+IN–OVR2CLARGER1VDC–+6411 F03OUT–VDCFigure 3. Using Resistor Dividers to Set the Input Common Mode Voltage When AC Coupling–50–55–60DISTORTION (dBc)–65–70–75–80–85VCC = 5V, VEE = 0VAV= 2TA = 25°CHD3+–CLARGEIN–OUT+VDCIM3VDC–+6411 F02OUT–VDCHD2–901.61.71.81.92.02.12.22.32.42.5VCM (V)6411 F04Figure 2. LT6411 Confi gured with a Differential Gain of 2 and Unity DC Common Mode GainFigure 4. Harmonic and Intermodulation Distortion of the LT6411 Driving an LTC2249 Versus DC Common Mode Voltage. Harmonic Distortion Measured with a –1dBFS Signal at 30.2MHz. Intermodulation Distortion Measured with Two –7dBFS Tones at 30.2MHz and 29.2MHz6411f10元器件交易网www.cecb2b.com
LT6411APPLICATIONS INFORMATIONthe output signals can be AC coupled and DC biased in a manner similar to what is shown at the inputs in Figure 3. A simpler alternative when using an ADC such as the LTC2249 is to use the ADC’s VCM pin to set the optimal common mode voltage as shown in Figure 5. If unity common mode gain and difference mode response to DC is desired, there is another confi guration available. Figure 6 shows the LT6411 connected to provide a differ-ential signal gain of +3 with unity common mode gain. For differential signal gain between unity and +3, three resistors can be added to provide attenuation and set the differential input impedance of the stage as illustrated in Figure 7. The general expression for the differential gain is:2•kAV(DIFF)=1+k+2 Scaling factor ‘k’ is the multiple between the two equal-value series input resistors and the resistor connected between the two positive inputs. The correct value of R for the external resistors can be computed from the desired differential input impedance, ZIN, as a function of k and the 370Ω internal gain setting resistors, as described in the equation:R= ZIN•370Ω370Ω(k+2)–ZIN(k+1)+VIN+VCMLT6411+–OUT+VCMIN–VCM–+6411 F06OUT–VCMFigure 6. LT6411 Confi gured for a Differential Gain of +3 and Unity Common Mode Gain with Response to DC+VIN+VCMR = 13.7ΩLT6411+–OUT+VCMk • R = 27.4ΩIN–VCMR = 13.7Ω6411 F07–+OUT–VCMFigure 7. LT6411 Confi gured with a Differential Input Impedance of 50Ω, a Differential Gain of +2 and Unity Common Mode GainIn Figure 7 k = 2 and R = 13.7Ω, setting the differential gain to +2 and the differential input impedance to ap-proximately 50Ω.+VIN+OVLT6411CLARGE+–10kIN–OVLTC2249VCM10k2.2µF6411 F05–+CLARGE–VFigure 5. Level Shifting the Output Common Mode Voltage of the LT6411 Using the VCM Pin of an LTC22496411f11元器件交易网www.cecb2b.com
LT6411APPLICATIONS INFORMATIONLayout and GroundingIt is imperative that care is taken in PCB layout in order to utilize the very high speed and very low crosstalk of the LT6411. Separate power and ground planes are highly recommended and trace lengths should be kept as short as possible. If input or output traces must be run over a distance of several centimeters, they should use a controlled impedance with matching series and shunt resistances to maintain signal fi delity.Series termination resistors should be placed as close to the output pins as possible to minimize output capacitance. See the Typical Performance Characteristics section for a plot of frequency response with various output capaci-tors—only 12pF of parasitic output capacitance causes 6dB of peaking in the frequency response!Low ESL/ESR bypass capacitors should be placed as close to the positive and negative supply pins as possible. One 4700pF ceramic capacitor is recommended for both VCC and VEE. Additional 470pF ceramic capacitors with minimal trace length on each supply pin will further improve AC and transient response as well as channel isolation. For high current drive and large-signal transient applications, additional 1µF to 10µF tantalums should be added on each supply. The smallest value capacitors should be placed closest to the LT6411 package.If the undriven input pins are not connected directly to a low impedance ground plane, they must be carefully bypassed to maintain minimal impedance over frequency. Although crosstalk will be very dependent on the board layout, a recommended starting point for bypass capacitors would be 470pF as close as possible to each input pin with one 4700pF capacitor in parallel.To maintain the LT6411’s channel isolation, it is benefi cial to shield parallel input and output traces using a ground plane or power supply traces. Vias between topside and backside metal may be required to maintain a low inductance ground near the part where numerous traces converge.ESD ProtectionThe LT6411 has reverse-biased ESD protection diodes on all pins. If any pins are forced a diode drop above the positive supply or a diode drop below the negative sup-ply, large currents may fl ow through these diodes. If the current is kept below 10mA, no damage to the devices will occur.TYPICAL APPLICATIONSSingle-Ended to Differential ConverterBecause the gains of each channel of the LT6411 can be confi gured independently, the LT6411 can be used to provide a gain of +2 when amplifying differential signals and when converting single-ended signals to differential. With both channels connected to a single-ended input, one channel confi gured with a gain of +1 and the other confi gured with a gain of –1, the output will be a differential version of the input with twice the peak-to-peak (differential) amplitude. Figure 8 shows the proper connections and Figure 9 displays the resulting performance when driv-ing an LTC2249. This confi guration can preserve signal amplitude when converting single ended video signals to differential signals when driving double terminated cables. The 10k resistors in Figure 8 set the common mode volt-age at the output.5VVCCIN1+1µFINPUT5VVCM0.1µF10kIN2+VEEIN1–IN2–370Ω370ΩLT6411+–370Ω370ΩOUT1OUT+–+DGNDEN6411 F08 OUT2OUT–10kFigure 8. Single-Ended to Differential Converter with Gain of +2 and Common Mode Control6411f12元器件交易网www.cecb2b.com
LT6411TYPICAL APPLICATIONS0–10–20–30–40–50–60–70–80–90–100–110–120–130–14032768 POINT FFTTONE 1 AT 29.5MHz, –7dBFSTONE 2 AT 30.5MHz, –7dBFSIM3 = –90dBc5VIN+13141516+–6,9,1050Ω50Ω100ΩRECEIVERAMPLITUDE (dBFS)LT6411AV = 251,2,3,7–5VIN–6411 F1011,12Figure 10. Twisted-Pair Driver051015202530FREQUENCY (MHz)35406411 F09Figure 9. 2-Tone Response of the LT6411 Confi gured with Single-Ended Inputs Driving the LTC2249 at 29.5MHz, 30.5MHzof 100Ω, the cables can be terminated with a smaller series resistance or a larger shunt resistance in order to compensate for attenuation. A typical circuit for a twisted-pair driver is shown in Figure 10.Single Supply Differential ADC DriverThe LT6411 is well suited for driving differential analog to digital converters. The low output impedance of the LT6411 is capable of driving a variety of fi lters as well as interfacing with the typically high impedance inputs of ADCs. In addition, the LT6411’s excellent distortion allows the part to perform with an SFDR below the limits of many high speed ADCs. The DC1057 demo board, shown sche-matically in Figure 11 and physically in Figure 12, allows implementation and testing of the LT6411 with a variety of different Linear Technology high speed ADCs.Twisted-Pair Line DriverThe LT6411 is ideal when used for driving inexpensive unshielded twisted-pair wires as often found in telephone or communications infrastructure. The input can be com-posite video, or if three parts are used, RGB or similar and can be either single ended or differential. The LT6411 has excellent performance with all formats.Double termination of the video cable will enhance fi delity and isolate the LT6411 from capacitive loads. Although most twisted-pair cables have a characteristic impedance 6411f13元器件交易网www.cecb2b.com
LT6411TYPICAL APPLICATIONSVCCCD10.1µFVEECD24700pFJP1R1ENABLE10Ω10603VCC23L2TBD06036R51314C8TBD0603R13C9C11R14C12VEER17OPTVCCR18CD5470pFCD6CD74700pF1µFCD80.1µF0603C31OPT“B” CASE6411 F11+C1OPT“B” CASEE1VCCE2GNDCD3470pFVCCJ1AIN+R4OPT0603R6T1TBDETC1-1TTR06035124J2AIN–R160Ω3R38OPTVCCR37OPTR7C2R2OPTC3C5R3CD40.1µF9101112OUT18VCCVCCVCCENDGNDIN1+IN1–IN2–IN2+1237LT6411VEEOUT24R810Ω1%R910Ω1%L1TBDR12060310Ω1%L3TBD0603C4R3512.1Ω1%AIN+TOADCINPUTSAIN–R1015165R1110Ω1%C6C7R3612.1Ω1%C10VEEVEEVEEVEENCFigure 11. DC1057 Demo Circuit SchematicFigure 12. Layout of DC1057 Demo Circuit6411f14+R190ΩE7VEEOPTE8GND元器件交易网www.cecb2b.com
LT6411SIMPLIFIED SCHEMATICVCCTO OTHERAMPLIFIERIN–370Ω46k1kENIN+150Ω370ΩVEEOUTVCCVCCBIASDGNDVEE6411 SSVEEPACKAGE DESCRIPTIONUD Package16-Lead Plastic QFN (3mm × 3mm)(Reference LTC DWG # 05-08-1691)BOTTOM VIEW—EXPOSED PAD3.00 ± 0.10(4 SIDES)0.70 ±0.05PIN 1TOP MARK(NOTE 6)1.45 ± 0.10(4-SIDES)0.75 ± 0.05R = 0.115TYP15160.40 ± 0.1012PIN 1 NOTCH R = 0.20 TYPOR 0.25 × 45° CHAMFER3.50 ± 0.051.45 ± 0.052.10 ± 0.05(4 SIDES)PACKAGEOUTLINE0.25 ±0.050.50 BSCRECOMMENDED SOLDER PAD PITCH AND DIMENSIONSNOTE:1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)2. DRAWING NOT TO SCALE3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.200 REF0.00 – 0.05(UD16) QFN 09040.25 ± 0.050.50 BSC6411fInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.15元器件交易网www.cecb2b.com
LT6411TYPICAL APPLICATIONIn cases where lowering the noise fl oor is paramount, adding higher order lowpass or bandpass fi ltering can signifi cantly increase signal-to-noise ratio. In Figure 13, the LT6411 is shown driving an LTC2249 with a 2nd order lowpass fi lter that has been carefully chosen to ensure optimal intermodulation distortion. The response is shown in Figure 14. The fi lter improves the SNR over the unfi ltered case by 6dB to 69.5dB. With the fi lter, the SNR of the ADC and the LT6411 are comparable; better SNR can be achieved by using either a higher resolution ADC IN+1.9VDCIN–1.9VDC5V80.6Ω55ΩLT641155Ω390nH15pF390nH80.6Ω10Ω10ΩAIN–LTC2249AIN+6411 F13or additional fi ltering. Figure 15 shows the corresponding SFDR of –75.5dBc with a 30MHz tone. Figure 16 shows the 2-tone response of the LT6411 with 29.5MHz and 30.5MHz inputs. Note that 0dBFS corresponds to a 2VP-P differential signal.963GAIN (dB)0–3–6–9–12+––+110100FREQUENCY (MHz)10006411 F14Figure 13. Optimized 30MHz LT6411 Differential ADC Driver0–108192 POINT FFTf = 30MHz, –1dBFS–20INSNR = 69.5dB–30SFDR = 75.5dB–40–50–60–70–80–90–100–110–120–130–140101520253050FREQUENCY (MHz)Figure 14. Frequency Response of the LT6411 and Filter0–10–20–30–40–50–60–70–80–90–100–110–120–130–14032768 POINT FFTTONE 1 AT 29.5MHz, –7dBFSTONE 2 AT 30.5MHz, –7dBFSIM3 = –89.7dBcAMPLITUDE (dBFS)AMPLITUDE (dBFS)354005106411 F1515202530FREQUENCY (MHz)35406411 F16Figure 15. SNR and SFDR of the LT6411 and Filter Driving the LTC2249Figure 16. 2-Tone Response of the LT6411 and Filter Driving the LTC2249 at 29.5MHz, 30.5MHzRELATED PARTSPART NUMBERLT1993-2 LT1993-4LT1993-10LT1994LT6402-6LT6553LT6554DESCRIPTION800MHz Low Distortion, Low Noise ADC Driver, AV = 2900MHz Low Distortion, Low Noise ADC Driver, AV = 4700MHz Low Distortion, Low Noise ADC Driver, AV = 10Low Noise, Low Distortion Fully Differential Amplfi er300MHz Low Distortion, Low Noise ADC Driver, AV = 2650MHz Gain of 2 Triple Video Amplifi er650MHz Gain of 1 Triple Video Amplifi erCOMMENTS3.8nV/√Hz Total Noise, Low Distortion to 100MHz2.4nV/√Hz Total Noise, Low Distortion to 100MHz1.9nV/√Hz Total Noise, Low Distortion to 100MHz70MHz Gain Bandwidth Differential In and Out3.8nV/√Hz Input Referred Noise, Low Distortion to 30MHzTriple Amplifi er with Fixed GainTriple Amplifi er with Fixed Gain6411fLT 0606 • PRINTED IN USA
16Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com© LINEAR TECHNOLOGY CORPORATION 2006
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