Charge pump circuit for generating high voltages r

专利名称：Charge pump circuit for generating high

voltages required in

read/write/erase/standby modes in non-volatile memory device

发明人：Takanori Yamazoe,Yuichiro

Akimoto,Hisanobu Ishida,EijiYamasaki,Nobuhiro Oodaira

申请号：US11050753申请日：20050207公开号：US07221610B2公开日：20070522

专利附图：

摘要：Different stepped-up voltages and different output currents are generated inone charge pump circuit without increasing the chip area of the charge pump circuit andalso electric power consumption in the charge pump circuit to be reduced to a very lowpower consumption level in standby mode and other modes. A semiconductor integratedcircuit device comprises one charge pump circuit with an N number of basic pump cellstages connected to step up voltages in the erase and write modes of a non-volatilememory or the like, generates stepped-up voltages lower than in the erase and writemodes and different from one another in output current supply capability, by usingseries- or parallel-connected pump cells not in excess of the N number of pump cellstages mentioned above, and changes a voltage step-up clock to a stepped-up voltagedetection signal.

申请人：Takanori Yamazoe,Yuichiro Akimoto,Hisanobu Ishida,Eiji Yamasaki,NobuhiroOodaira

地址：Hadano JP,Kawasaki JP,Kokubunji JP,Kodaira JP,Akishima JP

国籍：JP,JP,JP,JP,JP

代理机构：Antonelli, Terry, Stout & Kraus, LLP.

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