LMH6618 Single/LMH6619 Dual 130 MHz, 1.25 mA RRIO Operational Amplifiers
Literature Number: SNOSAV7C
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LMH6618 Single/LMH6619 Dual 130 MHz, 1.25 mA RRIO Operational AmplifiersAugust 12, 2008
LMH6618 Single/LMH6619 Dual
130 MHz, 1.25 mA RRIO Operational Amplifiers
General Description
The LMH6618 (single, with shutdown) and LMH6619 (dual)are 130 MHz rail-to-rail input and output amplifiers designedfor ease of use in a wide range of applications requiring highspeed, low supply current, low noise, and the ability to drivecomplex ADC and video loads. The operating voltage rangeextends from 2.7V to 11V and the supply current is typically1.25 mA per channel at 5V. The LMH6618 and LMH6619 aremembers of the PowerWise® family and have an exceptionalpower-to-performance ratio.
The amplifier’s voltage feedback design topology providesbalanced inputs and high open loop gain for ease of use andaccuracy in applications such as active filter design. Offsetvoltage is typically 0.1 mV and settling time to 0.01% is 120ns which combined with an 100 dBc SFDR at 100 kHz makesthe part suitable for use as an input buffer for popular 8-bit,10-bit, 12-bit and 14-bit mega-sample ADCs.
The input common mode range extends 200 mV beyond thesupply rails. On a single 5V supply with a ground terminated150Ω load the output swings to within 37 mV of the groundrail, while a mid-rail terminated 1 kΩ load will swing to 77 mVof either rail, providing true single supply operation and max-imum signal dynamic range on low power rails. The amplifieroutput will source and sink 35 mA and drive up to 30 pF loadswithout the need for external compensation.
The LMH6618 has an active low disable pin which reducesthe supply current to 72 µA and is offered in the space saving6-Pin TSOT23 package. The LMH6619 is offered in the 8-PinSOIC package. The LMH6618 and LMH6619 are availablewith a −40°C to +125°C extended industrial temperaturegrade.
Features
VS = 5V, RL = 1 kΩ, TA = 25°C and AV = +1, unless otherwisespecified.
2.7V to 11V■Operating voltage range
1.25 mA■Supply current per channel
130 MHz■Small signal bandwidth
±0.6 mV■Input offset voltage (limit at 25°C)
55 V/µs■Slew rate
90 ns■Settling time to 0.1%
120 ns■Settling time to 0.01%
100 dBc■SFDR (f = 100 kHz, AV = +1, VOUT = 2 VPP)
15 MHz■0.1 dB bandwidth (AV = +2)
10 nV/√Hz■Low voltage noise
−40°C to +125°C■Industrial temperature grade
■Rail-to-Rail input and output
Applications
■■■■■■■
ADC driverDAC bufferActive filters
High speed sensor amplifierCurrent sense amplifierPortable video
STB, TV video amplifier
Typical Application
20195829
WEBENCH® is a registered trademark of National Semiconductor Corporation.
© 2008 National Semiconductor Corporation201958www.national.com
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LMH6618/LMH6619Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.ESD Tolerance (Note 2) Human Body Model For input pins only For all other pins Machine Model
Supply Voltage (VS = V+ – V−)Junction Temperature (Note 3)12V
150°C max
(Note 1)
2.7V to 11V−40°C to +125°C
231°C/W160°C/W
Operating Ratings
Supply Voltage (VS = V+ – V−)
Ambient Temperature Range (Note 3)
2000V2000V200V
Package Thermal Resistance (θJA) 6-Pin TSOT23 8-Pin SOIC
+3V Electrical Characteristics
Symbol
Parameter
V+ = 3V, V− = 0V, DISABLE = 3V, VCM = VO = V+/2, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV
Condition
Unless otherwise specified, all limits are guaranteed for TJ = +25°C,
≠ +1, RL = 1 kΩ || 5 pF.
Boldface Limits apply at temperature extremes. (Note 4)
MinTypMax(Note 8)(Note 7)(Note 8)
5555
12056716313131.5150.10.1
Units
Frequency Domain ResponseSSBW
–3 dB Bandwidth Small Signal
AV = 1, RL = 1 kΩ, VOUT = 0.2 VPPAV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP
GBWGBWLSBW
Gain Bandwidth (LMH6618)Gain Bandwidth (LMH6619)−3 dB Bandwidth Large Signal
AV = 10, RF = 2 kΩ, RG = 221Ω,RL = 1 kΩ, VOUT = 0.2 VPPAV = 10, RF = 2 kΩ, RG = 221Ω,RL = 1 kΩ, VOUT = 0.2 VPPAV = 1, RL = 1 kΩ, VOUT = 2 VPPAV = 2, RL = 150Ω, VOUT = 2 VPP
Peak0.1dBBWDGDP
Peaking
0.1 dB BandwidthDifferential GainDifferential Phase
AV = 1, CL = 5 pFAV = 2, VOUT = 0.5 VPP ,RF = RG = 825Ω
AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,RL = 150Ω to V+/2
AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,RL = 150Ω to V+/2
Time Domain Responsetr/tfSRts_0.1ts_0.01SFDR
Rise & Fall TimeSlew Rate0.1% Settling Time0.01% Settling Time
Spurious Free Dynamic Range
2V Step, AV = 12V Step, AV = 12V Step, AV = −12V Step, AV = −1
fC = 100 kHz, VOUT= 2 VPP, RL = 1 kΩfC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩfC = 5 MHz, VOUT = 2 VPP, RL = 1 kΩ
eninCTVOSTCVOSIBIOS
Input Voltage Noise DensityInput Current Noise DensityCrosstalk (LMH6619)Input Offset Voltage
f = 100 kHzf = 100 kHz
f = 5 MHz, VIN = 2 VPPVCM = 0.5V (pnp active)VCM = 2.5V (npn active)VCM = 0.5V (pnp active)VCM = 2.5V (npn active)
Input Offset Current
36
3646901201006147101800.10.8−1.4+1.00.01
±0.6±1.0 −2.6+1.8±0.27
nV/pA/dBdBcnsV/μsnsdeg%MHzdBMHzMHzMHzMHz
Noise and Distortion Performance
Input, DC Performance
mVμV/°CμAμA
Input Offset Voltage Temperature Drift(Note 5)Input Bias Current
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LMH6618/LMH6619SymbolCINRINCMVRCMRRAOL
Parameter
Input CapacitanceInput Resistance
Common Mode Voltage RangeCommon Mode Rejection RatioOpen Loop Voltage Gain
Condition
MinTypMax(Note 8)(Note 7)(Note 8)
−0.278818576 ±25 2.0 84
1.58 961079882501606017029501606217534±350.17 0.04 125901041.21.259
3.2 566217219866741842173943566217219868761892224448 1.0 1.51.71.51.7585
UnitspFMΩVdBdB
DC, CMRR ≥ 65 dB
VCM Stepped from −0.1V to 1.4VVCM Stepped from 2.0V to 3.1VRL = 1 kΩ to +2.7V or +0.3VRL = 150Ω to +2.6V or +0.4V
Output DC CharacteristicsVOUT
Output Voltage Swing High (LMH6618)RL = 1 kΩ to V+/2(Voltage from V+ Supply Rail)
RL =150Ω to V+/2
Output Voltage Swing Low (LMH6618)RL = 1 kΩ to V+/2(Voltage from V− Supply Rail)
RL = 150Ω to V+/2RL = 150Ω to V−
Output Voltage Swing High (LMH6619)RL = 1 kΩ to V+/2(Voltage from V+ Supply Rail)
RL =150Ω to V+/2
Output Voltage Swing Low (LMH6619)RL = 1 kΩ to V+/2(Voltage from V− Supply Rail)
RL =150Ω to V+/2RL = 150Ω to V−
IOUTROUT tontoffPSRRIS
Linear Output CurrentOutput Resistance
Enable High Voltage ThresholdEnable Pin High CurrentEnable Low Voltage ThresholdEnable Pin Low CurrentTurn-On TimeTurn-Off Time
Power Supply Rejection RatioSupply Current (LMH6618)Supply Current (LMH6619)(per channel)
ISD
Disable Shutdown Current
VOUT = V+/2 (Note 6)f = 1 MHzEnabledVDISABLE = 3VDisabledVDISABLE = 0V
DC, VCM = 0.5V, VS = 2.7V to 11VRL = ∞RL = ∞DISABLE = 0VmV fromeither rail
mV fromeither rail
mAΩVµAVµAnsnsdB
Enable Pin Operation
Power Supply Performance
mA
μA
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LMH6618/LMH6619+5V Electrical Characteristics
Symbol
Parameter
Unless otherwise specified, all limits are guaranteed for TJ = +25°C,
V+ = 5V, V− = 0V, DISABLE = 5V, VCM = VO = V+/2, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF.Boldface Limits apply at temperature extremes.
Condition
MinTypMax(Note 8)(Note 7)(Note 8)
5454
13053645715150.5150.10.1
Units
Frequency Domain ResponseSSBW
–3 dB Bandwidth Small Signal
AV = 1, RL = 1 kΩ, VOUT = 0.2 VPPAV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP
GBWGBWLSBW
Gain Bandwidth (LMH6618)Gain Bandwidth (LMH6619)−3 dB Bandwidth Large Signal
AV = 10, RF = 2 kΩ, RG = 221Ω,RL = 1 kΩ, VOUT = 0.2 VPPAV = 10, RF = 2 kΩ, RG = 221Ω,RL = 1 kΩ, VOUT = 0.2 VPPAV = 1, RL = 1 kΩ, VOUT = 2 VPPAV = 2, RL = 150Ω, VOUT = 2 VPP
Peak0.1dBBWDGDP
Peaking
0.1 dB BandwidthDifferential GainDifferential Phase
AV = 1, CL = 5 pFAV = 2, VOUT = 0.5 VPP,RF = RG = 1 kΩ
AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,RL = 150Ω to V+/2
AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,RL = 150Ω to V+/2
Time Domain Responsetr/tfSRts_0.1ts_0.01SFDR
Rise & Fall TimeSlew Rate0.1% Settling Time0.01% Settling Time
Spurious Free Dynamic Range
2V Step, AV = 12V Step, AV = 12V Step, AV = −12V Step, AV = −1
fC = 100 kHz, VOUT = 2 VPP, RL = 1 kΩfC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩfC = 5 MHz, VO = 2 VPP, RL = 1 kΩ
eninCTVOSTCVOSIBIOSCINRINCMVRCMRRAOL
Input Voltage Noise DensityInput Current Noise DensityCrosstalk (LMH6619)Input Offset Voltage
f = 100 kHzf = 100 kHz
f = 5 MHz, VIN = 2 VPPVCM = 0.5V (pnp active)VCM = 4.5V (npn active)VCM = 0.5V (pnp active)VCM = 4.5V (npn active)
Input Offset CurrentInput CapacitanceInput Resistance
Common Mode Voltage RangeCommon Mode Rejection RatioOpen Loop Voltage Gain
DC, CMRR ≥ 65 dB
VCM Stepped from −0.1V to 3.4VVCM Stepped from 4.0V to 5.1VRL = 1 kΩ to +4.6V or +0.4VRL = 150Ω to +4.5V or +0.5V
44 −0.281848478
3055901201008861101800.10.8−1.5+1.00.011.58 9810810083
±0.6±1.0 −2.4+1.9±0.26 5.2
nV/pA/dBdBcnsV/μsnsdeg%MHzdBMHzMHzMHzMHz
Distortion and Noise Performance
Input, DC Performance
mVµV/°CμAμApFMΩVdBdB
Input Offset Voltage Temperature Drift(Note 5)Input Bias Current
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LMH6618/LMH6619SymbolParameterCondition
MinTypMax(Note 8)(Note 7)(Note 8)
±25 3.0 84
602307525032602307725537±350.17 1.2 2.525901041.251.372
738225529583962703214345738225529585982753264850 2.0 1.51.71.51.75105
Units
Output DC CharacteristicsVOUT
Output Voltage Swing High (LMH6618)RL = 1 kΩ to V+/2(Voltage from V+ Supply Rail)
RL = 150Ω to V+/2
Output Voltage Swing Low (LMH6618)RL = 1 kΩ to V+/2(Voltage from V− Supply Rail)
RL = 150Ω to V+/2RL = 150Ω to V−
Output Voltage Swing High (LMH6619)RL = 1 kΩ to V+/2(Voltage from V+ Supply Rail)
RL = 150Ω to V+/2
Output Voltage Swing Low (LMH6619)RL = 1 kΩ to V+/2(Voltage from V− Supply Rail)
RL = 150Ω to V+/2RL = 150Ω to V−
IOUTROUT tontoffPSRRIS
Linear Output CurrentOutput Resistance
Enable High Voltage ThresholdEnable Pin High CurrentEnable Low Voltage ThresholdEnable Pin Low CurrentTurn-On TimeTurn-Off Time
Power Supply Rejection RatioSupply Current (LMH6618)Supply Current (LMH6619)(per channel)
ISD
Disable Shutdown Current
VOUT = V+/2 (Note 6)f = 1 MHzEnabledVDISABLE = 5VDisabledVDISABLE = 0V
DC, VCM = 0.5V, VS = 2.7V to 11VRL = ∞RL = ∞DISABLE = 0VmV fromeither rail
mV fromeither rail
mAΩVµAVµAnsnsdB
Enable Pin Operation
Power Supply Performance
mA
μA
±5V Electrical Characteristics
Boldface Limits apply at temperature extremes.Symbol
Parameter
V+ = 5V, V− = −5V, DISABLE = 5V, VCM = VO = 0V, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV
Condition
Unless otherwise specified, all limits are guaranteed for TJ = +25°C,
≠ +1, RL = 1 kΩ || 5 pF.
MinTypMax(Note 8)(Note 7)(Note 8)
5454
140536558
Units
Frequency Domain ResponseSSBW
–3 dB Bandwidth Small Signal
AV = 1, RL = 1 kΩ, VOUT = 0.2 VPPAV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP
GBWGBW
Gain Bandwidth (LMH6618)Gain Bandwidth (LMH6619)
AV = 10, RF = 2 kΩ, RG = 221Ω,RL = 1 kΩ, VOUT = 0.2 VPPAV = 10, RF = 2 kΩ, RG = 221Ω,RL = 1 kΩ, VOUT = 0.2 VPP
MHzMHzMHz
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LMH6618/LMH6619SymbolLSBW
Parameter
−3 dB Bandwidth Large Signal
Condition
AV = 1, RL = 1 kΩ, VOUT = 2 VPPAV = 2, RL = 150Ω, VOUT = 2 VPPAV = 1, CL = 5 pFAV = 2, VOUT = 0.5 VPP,RF = RG = 1.21 kΩ
AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,RL = 150Ω to V+/2
AV = +2, 4.43 MHz, 0.6V < VOUT < 2V,RL = 150Ω to V+/2
MinTypMax(Note 8)(Note 7)(Note 8)
16150.05150.10.1
Units
MHzdBMHz%deg
Peak0.1dBBWDGDP
Peaking
0.1 dB BandwidthDifferential GainDifferential Phase
Time Domain Responsetr/tfSRts_0.1ts_0.01SFDR
Rise & Fall TimeSlew Rate0.1% Settling Time0.01% Settling Time
Spurious Free Dynamic Range
2V Step, AV = 12V Step, AV = 12V Step, AV = −12V Step, AV = −1
fC = 100 kHz, VOUT = 2 VPP, RL = 1 kΩfC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩfC = 5 MHz, VOUT = 2 VPP, RL = 1 kΩ
eninCTVOSTCVOSIBIOSCINRINCMVRCMRRAOL
Input Voltage Noise DensityInput Current Noise DensityCrosstalk (LMH6619)Input Offset Voltage
f = 100 kHzf = 100 kHz
f = 5 MHz, VIN = 2 VPPVCM = −4.5V (pnp active)VCM = 4.5V (npn active)VCM = −4.5V (pnp active)VCM = 4.5V (npn active)
Input Offset CurrentInput CapacitanceInput Resistance
Common Mode Voltage RangeCommon Mode Rejection RatioOpen Loop Voltage Gain
DC, CMRR ≥ 65 dB
VCM Stepped from −5.1V to 3.4VVCM Stepped from 4.0V to 5.1VRL = 1 kΩ to +4.6V or −4.6VRL = 150Ω to +4.3V or −4.3V
45 −5.284838679
3057901201008870101800.10.9−1.5+1.00.011.58 1001089584
±0.6±1.0 −2.4+1.9±0.26 5.2
nV/pA/dBdBcnsV/μsns
Noise and Distortion Performance
Input DC Performance
mVµV/°CμAμApFMΩVdBdB
Input Offset Voltage Temperature Drift(Note 5)Input Bias Current
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LMH6618/LMH6619SymbolParameterCondition
MinTypMax(Note 8)(Note 7)(Note 8)
±25 0.5 84
1004301104403510043011545045±350.17 16 1725901041.351.45103
11112645752612113647455951521111264575261261414845696162 −0.5 1.61.91.652.0140
Units
Output DC CharacteristicsVOUT
Output Voltage Swing High (LMH6618)RL = 1 kΩ to GND(Voltage from V+ Supply Rail)
RL = 150Ω to GND
Output Voltage Swing Low (LMH6618)RL = 1 kΩ to GND(Voltage from V− Supply Rail)
RL = 150Ω to GNDRL = 150Ω to V−
Output Voltage Swing High (LMH6619)RL = 1 kΩ to GND(Voltage from V+ Supply Rail)
RL = 150Ω to GND
Output Voltage Swing Low (LMH6619)RL = 1 kΩ to GND(Voltage from V− Supply Rail)
RL = 150Ω to GNDRL = 150Ω to V−
IOUTROUT tontoffPSRRIS
Linear Output CurrentOutput Resistance
Enable High Voltage ThresholdEnable Pin High CurrentEnable Low Voltage ThresholdEnable Pin Low CurrentTurn-On TimeTurn-Off Time
Power Supply Rejection RatioSupply Current (LMH6618)Supply Current (LMH6619)(per channel)
ISD
Disable Shutdown Current
VOUT = V+/2 (Note 6)f = 1 MHzEnabledVDISABLE = +5VDisabledVDISABLE = −5V
DC, VCM = −4.5V, VS = 2.7V to 11VRL = ∞RL = ∞DISABLE = −5VmV fromeither rail
mV fromeither rail
mAΩVµAVµAnsnsdB
Enable Pin Operation
Power Supply Performance
mA
μA
Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device isintended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.Note 2:Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3:The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature isPD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.Note 4:Boldface limits apply to temperature range of −40°C to 125°C
Note 5:Voltage average drift is determined by dividing the change in VOS by temperature change.
Note 6:Do not short circuit the output. Continuous source or sink currents larger than the IOUT typical are not recommended as it may damage the part.Note 7:Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and willalso depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 8:Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical QualityControl (SQC) method.
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LMH6618/LMH6619Connection Diagrams
6-Pin TSOT23
8-Pin SOIC
Top View
20195801
Top View
20195878
Ordering Information
Package6-Pin TSOT23
Part NumberLMH6618MKLMH6618MKELMH6618MKXLMH6619MA
8-Pin SOIC
LMH6619MAELMH6619MAX
LMH6619MA
AE4APackage Marking
Transport Media1k Units Tape and Reel250 Units Tape and Reel3k Units Tape and Reel
95 Units/Rail250 Units Tape and Reel2.5k Units Tape and Reel
M08AMK06ANSC Drawing
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LMH6618/LMH6619Typical Performance Characteristics
unless otherwise specified.
Closed Loop Frequency Response for
Various Supplies
At TJ = 25°C, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1,
Closed Loop Frequency Response for
Various Supplies
2019583120195816
Closed Loop Frequency Response for
Various SuppliesClosed Loop Frequency Response for
Various Supplies
2019581520195817
Closed Loop Frequency Response for
Various TemperaturesClosed Loop Frequency Response for
Various Temperatures
2019581920195820
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LMH6618/LMH6619Closed Loop Gain vs. Frequency for
Various Gains
Large Signal Frequency Response
20195818
20195830
±0.1 dB Gain Flatness for Various Supplies
Small Signal Frequency Response with
Various Capacitive Load
20195832
20195826
Small Signal Frequency Response withCapacitive Load and Various RISO
HD2 vs. Frequency and Supply Voltage
20195835
20195827
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LMH6618/LMH6619HD3 vs. Frequency and Supply VoltageHD2 and HD3 vs. Frequency and Load
20195836
20195871
HD2 and HD3 vs. Common Mode VoltageHD2 and HD3 vs. Common Mode Voltage
2019587220195873
HD2 vs. Frequency and GainHD3 vs. Frequency and Gain
2019587420195875
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LMH6618/LMH6619Open Loop Gain/PhaseHD2 vs. Output Swing
20195833
20195843
HD3 vs. Output SwingHD2 vs. Output Swing
2019584420195845
HD2 vs. Output SwingHD3 vs. Output Swing
2019586920195846
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LMH6618/LMH6619HD3 vs. Output SwingTHD vs. Output Swing
20195870
20195847
Settling Time vs. Input Step Amplitude
(Output Slew and Settle Time)
Input Noise vs. Frequency
20195876
20195821
VOS vs. VOUTVOS vs. VOUT
2019584920195850
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LMH6618/LMH6619VOS vs. VCMVOS vs. VS (pnp)
20195851
20195852
VOS vs. VS (npn)VOS vs. IOUT
2019585320195854
VOS Distribution (pnp and npn)IB vs. VS (pnp)
20195855
20195877
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LMH6618/LMH6619IB vs. VS (npn)IS vs. VS
20195856
20195857
VOUT vs. VSVOUT vs. VS
20195858
20195859
VOUT vs. VSClosed Loop Output Impedance vs. Frequency AV = +1
2019586020195822
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LMH6618/LMH6619PSRR vs. FrequencyPSRR vs. Frequency
20195837
20195838
CMRR vs. FrequencyCrosstalk Rejection vs. Frequency (Output to Output)
2019582320195879
Small Signal Step ResponseSmall Signal Step Response
2019580520195806
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LMH6618/LMH6619Small Signal Step ResponseSmall Signal Step Response
2019580420195808
Small Signal Step ResponseSmall Signal Step Response
2019580920195807
Small Signal Step ResponseSmall Signal Step Response
2019581120195812
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LMH6618/LMH6619Small Signal Step ResponseLarge Signal Step Response
2019581020195813
Large Signal Step ResponseOverload Recovery Waveform
20195814
20195824
IS vs. VDISABLE20195861
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LMH6618/LMH6619Application Information
The LMH6618 and LMH6619 are based on NationalSemiconductor’s proprietary VIP10 dielectrically isolatedbipolar process. This device family architecture features thefollowing:
•Complimentary bipolar devices with exceptionally high ft
(∼8 GHz) even under low supply voltage (2.7V) and lowbias current.
•Common emitter push-push output stage. This
architecture allows the output to reach within millivolts ofeither supply rail.
•Consistent performance from any supply voltage (2.7V -11V) with little variation with supply voltage for the mostimportant specifications (e.g. BW, SR, IOUT.)
•Significant power saving compared to competitive deviceson the market with similar performance.
With 3V supplies and a common mode input voltage rangethat extends beyond either supply rail, the LMH6618 andLMH6619 are well suited to many low voltage/low power ap-plications. Even with 3V supplies, the −3 dB BW(at AV = +1) is typically 120 MHz.
The LMH6618 and LMH6619 are designed to avoid outputphase reversal. With input over-drive, the output is kept nearthe supply rail (or as close to it as mandated by the closedloop gain setting and the input voltage). Figure 1 shows theinput and output voltage when the input voltage significantlyexceeds the supply voltages.
100 µA. The DISABLE pin is “active low” and should be con-nected through a resistor to V+ for normal operation. Shut-down is guaranteed when the DISABLE pin is 0.5V below thesupply midpoint at any operating supply voltage and temper-ature.
In the shutdown mode, essentially all internal device biasingis turned off in order to minimize supply current flow and theoutput goes into high impedance mode. During shutdown, theinput stage has an equivalent circuit as shown in Figure 2.
20195839
FIGURE 2. Input Equivalent Circuit During ShutdownWhen the LMH6618 is shutdown, there may be current flowthrough the internal diodes shown, caused by input potential,if present. This current may flow through the external feed-back resistor and result in an apparent output signal. In mostshutdown applications the presence of this output is incon-sequential. However, if the output is “forced” by another de-vice, the other device will need to conduct the currentdescribed in order to maintain the output potential.
To keep the output at or near ground during shutdown whenthere is no other device to hold the output low, a switch usinga transistor can be used to shunt the output to ground.SINGLE CHANNEL ADC DRIVER
The low noise and wide bandwidth make the LMH6618 anexcellent choice for driving a 12-bit ADC. Figure 3 shows theschematic of the LMH6618 driving an ADC121S101. The AD-C121S101 is a single channel 12-bit ADC. The LMH6618 isset up in a 2nd order multiple-feedback configuration with again of −1. The −3 dB point is at 500 kHz and the −0.01 dBpoint is at 100 kHz. The 22Ω resistor and 390 pF capacitorform an antialiasing filter for the ADC121S101. The capacitoralso stores and delivers charge to the switched capacitor in-put of the ADC. The capacitive load on the LMH6618 createdby the 390 pF capacitor is decreased by the 22Ω resistor.Table 1 shows the performance data of the LMH6618 and theADC121S101.
20195825
FIGURE 1. Input and Output Shown with CMVR ExceededIf the input voltage range is exceeded by more than a diodedrop beyond either rail, the internal ESD protection diodes willstart to conduct. The current flow in these ESD diodes shouldbe externally limited.
The LMH6618 can be shutdown by connecting theDISABLE pin to a voltage 0.5V below the supply midpointwhich will reduce the supply current to typically less than
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LMH6618/LMH661920195829
FIGURE 3. LMH6618 Driving an ADC121S101
TABLE 1. Performance Data for the LMH6618 Driving an ADC121S101Parameter
Signal FrequencySignal AmplitudeSINADSNRTHDSFDRENOB
100 kHz4.5V71.5 dB71.87 dB−82.4 dB90.97 dB11.6 bits
Measured Value
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LMH6618/LMH6619When the op amp and the ADC are using the same supply, itis important that both devices are well bypassed. A 0.1 µFceramic capacitor and a 10 µF tantalum capacitor should belocated as close as possible to each supply pin. A samplelayout is shown in Figure 4. The 0.1 µF capacitors (C13 andC6) and the 10 µF capacitors (C11 and C5) are located veryclose to the supply pins of the LMH6618 and theADC121S101.
20195840
FIGURE 4. LMH6618 and ADC121S101 Layout
SINGLE TO DIFFERENTIAL ADC DRIVER
Figure 5 shows the LMH6619 used to drive a differential ADCwith a single-ended input. The ADC121S625 is a fully differ-ential 12-bit ADC. Table 2 shows the performance data of theLMH6619 and the ADC121S625.
20195880
FIGURE 5. LMH6619 Driving an ADC121S625
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LMH6618/LMH6619TABLE 2. Performance Data for the LMH6619 Driving an ADC121S625
ParameterSignal FrequencySignal AmplitudeSINADSNRTHDSFDRENOB
DIFFERENTIAL ADC DRIVER
The circuit in Figure 3 can be used to drive both inputs of adifferential ADC. Figure 6 shows the LMH6619 driving an AD-Measured Value10 kHz2.5V67.9 dB68.29 dB−78.6 dB75.0 dB11.0 bits
C121S705. The ADC121S705 is a fully differential 12-bitADC. Performance with this circuit is similar to the circuit inFigure 3.
20195842
FIGURE 6. LMH6619 Driving an ADC121S705
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LMH6618/LMH6619DC LEVEL SHIFTING
Often a signal must be both amplified and level shifted whileusing a single supply for the op amp. The circuit in Figure 7can do both of these tasks. The procedure for specifying theresistor values is as follows.
1.Determine the input voltage.
2.Calculate the input voltage midpoint, VINMID = VINMIN +
(VINMAX – VINMIN)/2.
3.Determine the output voltage needed.
4.Calculate the output voltage midpoint, VOUTMID =
VOUTMIN + (VOUTMAX – VOUTMIN)/2.
5.Calculate the gain needed, gain = (VOUTMAX – VOUTMIN)/
(VINMAX – VINMIN)
6.Calculate the amount the voltage needs to be shifted
from input to output, ΔVOUT = VOUTMID – gain x VINMID.7.Set the supply voltage to be used.
8.Calculate the noise gain, noise gain = gain + ΔVOUT/VS.9.Set RF.
10.Calculate R1, R1 = RF/gain.
11.Calculate R2, R2 = RF/(noise gain-gain).12.Calculate RG, RG= RF/(noise gain – 1).
Check that both the VIN and VOUT are within the voltageranges of the LMH6618.
The following example is for a VIN of 0V to 1V with a VOUT of2V to 4V.
1.VIN = 0V to 1V
2.VINMID = 0V + (1V – 0V)/2 = 0.5V3.VOUT = 2V to 4V
4.VOUTMID = 2V + (4V – 2V)/2 = 3V5.Gain = (4V – 2V)/(1V – 0V) = 26.ΔVOUT = 3V – 2 x 0.5V = 2
7.For the example the supply voltage will be +5V.8.Noise gain = 2 + 2/5V = 2.49.RF = 2 kΩ
10.R1 = 2 kΩ/2 = 1 kΩ
11.R2 = 2 kΩ/(2.4-2) = 5 kΩ
12.RG = 2 kΩ/(2.4 – 1) = 1.43 kΩ
20195848
FIGURE 7. DC Level Shifting
4th ORDER MULTIPLE FEEDBACK LOW-PASS FILTERFigure 8 shows the LMH6619 used as the amplifier in a mul-tiple feedback low pass filter. This filter is set up to have a gainof +1 and a −3 dB point of 1 MHz. Values can be determined
by using the WEBENCH® Active Filter Designer found atamplifiers.national.com.
20195828
FIGURE 8. 4th Order Multiple Feedback Low-Pass Filter
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LMH6618/LMH6619CURRENT SENSE AMPLIFIER
With it’s rail-to-rail input and output capability, low VOS, andlow IB the LMH6618 is an ideal choice for a current senseamplifier application. Figure 9 shows the schematic of theLMH6618 set up in a low-side sense configuration which pro-vides a conversion gain of 2V/A. Voltage error due to VOS canbe calculated to be VOS x (1 + RF/RG) or0.6 mV x 21 = 12.6 mV. Voltage error due to IO is IO x RF or0.26 µA x 1 kΩ = 0.26 mV. Hence total voltage error is12.6 mV + 0.26 mV or 12.86 mV which translates into a cur-rent error of 12.86 mV/(2 V/A) = 6.43 mA.
(1)
(2)
20195841
FIGURE 9. Current Sense Amplifier
20195865
TRANSIMPEDANCE AMPLIFIER
By definition, a photodiode produces either a current or volt-age output from exposure to a light source. A Tran-simpedance Amplifier (TIA) is utilized to convert this low-levelcurrent to a usable voltage signal. The TIA often will need tobe compensated to insure proper operation.
FIGURE 11. Bode Plot of Noise Gain Intersecting with Op
Amp Open-Loop GainFigure 11 shows the bode plot of the noise gain intersectingthe op amp open loop gain. With larger values of gain, CT andRF create a zero in the transfer function. At higher frequenciesthe circuit can become unstable due to excess phase shiftaround the loop.
A pole at fP in the noise gain function is created by placing afeedback capacitor (CF) across RF. The noise gain slope isflattened by choosing an appropriate value of CF for optimumperformance.
Theoretical expressions for calculating the optimum value ofCF and the expected −3 dB bandwidth are:
(3)
20195862
(4)
FIGURE 10. Photodiode Modeled with Capacitance
ElementsFigure 10 shows the LMH6618 modeled with photodiode andthe internal op amp capacitances. The LMH6618 allows cir-cuit operation of a low intensity light due to its low input biascurrent by using larger values of gain (RF). The total capaci-tance (CT) on the inverting terminal of the op amp includesthe photodiode capacitance (CPD) and the input capacitanceof the op amp (CIN). This total capacitance (CT) plays an im-portant role in the stability of the circuit. The noise gain of thiscircuit determines the stability and is defined by:
Equation 4 indicates that the −3 dB bandwidth of the TIA isinversely proportional to the feedback resistor. Therefore, ifthe bandwidth is important then the best approach would beto have a moderate transimpedance gain stage followed by abroadband voltage gain stage.
Table 3 shows the measurement results of the LMH6618 withdifferent photodiodes having various capacitances (CPD) anda feedback resistance (RF) of 1 kΩ.
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LMH6618/LMH6619TABLE 3. TIA (Figure 1) Compensation and Performance Results
CPD(pF)2247100222
Note:
GBWP = 65 MHzCT = CPD + CINCIN = 2 pFVS = ±2.5V
CT(pF)2449102224
CF CAL(pF)7.710.915.823.4
CF USED(pF)5.6101518
f −3 dB CAL(MHz)23.716.611.57.81
f −3 dB MEAS(MHz)2015.210.88
Peaking(dB)0.90.80.92.9
Figure 12 shows the frequency response for the various pho-todiodes in Table 3.
noise voltage, feedback resistor thermal noise, input noisecurrent, photodiode noise current) do not all operate over thesame frequency band. Therefore, when the noise at the out-put is calculated, this should be taken into account. The opamp noise voltage will be gained up in the region between thenoise gain’s zero and pole (fZ and fP in Figure 11). The higherthe values of RF and CT, the sooner the noise gain peakingstarts and therefore its contribution to the total output noisewill be larger. It is obvious to note that it is advantageous tominimize CIN by proper choice of op amp or by applying areverse bias across the diode at the expense of excess darkcurrent and noise.
DIFFERENTIAL CABLE DRIVER FOR NTSC VIDEO
The LMH6618 and LMH6619 can be used to drive an NTSCvideo signal on a twisted-pair cable. Figure 13 shows theschematic of a differential cable driver for NTSC video. Thiscircuit can be used to transmit the signal from a camera overa twisted pair to a monitor or display located a distance. C1and C2 are used to AC couple the video signal into theLMH6619. The two amplifiers of the LMH6619 are set to again of 2 to compensate for the 75Ω back termination resistorson the outputs. The LMH6618 is set to a gain of 1. Becauseof the DC bias the output of the LMH6618 is AC coupled. Mostmonitors and displays will accept AC coupled inputs.
20195868
FIGURE 12. Frequency Response for Various Photodiode
and Feedback CapacitorsWhen analyzing the noise at the output of the TIA, it is im-portant to note that the various noise sources (i.e. op amp
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LMH6618/LMH661920195881
FIGURE 13. Differential Cable Driver
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LMH6618/LMH6619Physical Dimensions inches (millimeters) unless otherwise noted
6-Pin TSOT23
NS Package Number MK06A
8-Pin SOIC
NS Package Number M08A
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